(a) Field of the Invention
The present invention relates to a method for fabricating a semiconductor device.
(b) Description of the Related Art
With the recent trend toward large-sized and large-capacity application apparatuses, a power semiconductor device having a high breakdown voltage, a high current capacity, and high-speed switching characteristics has become necessary.
The doping concentration and thickness of an epitaxial or drift region of a raw material used in the fabrication of a power semiconductor device is determined based on the rated voltage of the semiconductor device.
To achieve a high breakdown voltage, the doping concentration of the epitaxial or drift region needs to be sufficiently low, or the thickness thereof needs to be sufficiently large. This may result in an increase in the on-resistance of the power semiconductor. Thus, a variety of structures are being proposed to overcome this drawback by structural improvement of the device. For example, a super junction structure is a representative structure which shows improvement in breakdown voltage and on-resistance.
A super junction structure is a structure in which PN junctions are vertically arranged in an epitaxial or drift region. In a power semiconductor having a super junction structure, where a maximum electric field (i.e., threshold electric field) is observed when the power semiconductor is in the off state, a PN junction is formed vertically with respect to a substrate. This causes a depletion layer to extend horizontally, as well as vertically, to the substrate. As such, the threshold electric field is reached in a wide PN junction and its magnitude is constant in a direction vertical to the substrate.
As such, a power semiconductor using a super junction structure has low on-resistance because an epitaxial or drift region for maintaining a breakdown voltage equivalent to that of a typical power semiconductor is thin and has a high doping concentration.
In general, a super junction structure is formed by epitaxially growing an N type (or P type) semiconductor or performing trench etching, i.e., anisotropic etching, on the N type (or P type) semiconductor and either (a) depositing a P type (or N type) semiconductor or (b) ion-implanting impurities to form a P type (or N type) semiconductor.
Also, an epitaxial or drift region of desired thickness is formed by repeating the process of epitaxially growing a thin N type (or P type) semiconductor and ion-implanting impurities to form a P type (or N type) semiconductor.
In this method, however, it is difficult to perform high aspect-ratio anisotropic etching. As a result, it is difficult to form an epitaxial or drift region of a desired thickness, and PN junctions may be curved rather than smooth.
The above information disclosed in this Background section is only for enhancement of understanding of the background of the invention and therefore it may contain information that does not form the prior art that is already known in this country to a person of ordinary skill in the art.